/*****************************************************************************
*    Ali Corp. All Rights Reserved. 2008 Copyright (C)
*
*    File:	slot.S
*
*    Description:	This file contains all code in standby mode.
*    History:
*	Date 		Athor		Version		Reason
*	============	=======================================
*	1.07.04.2008	Mao Feng 	Ver 0.1		Create file.
*	
*****************************************************************************/
#include <hal/mips.h>
#include <hld/pan/pan.h>
//#include <sys_config.h>


#define COM_VERSION			0x00
#define SDRAM_ASR			0x04	// 16bits. 0x84-0x85: SDRAM ASR; 0x86-0x87:reserved
#define SDRAM_MSR			0x08	// 16bits. 0x88-0x89: SDRAM MSR; 0x8A-0x8B:reserved
#define FLASH_CTRL1			0x0C	// 32bits. sflash ctrl interface
#define FLASH_MCR1			0x10	// 32bits. flash memory control reg
#define FLASH_CTRL2			0x14	// 32bits. sflash ctrl interface
#define FLASH_MCR2			0x18	// 32bits. flash memory control reg
#define BOOT_LOGO			0x1C	// 16bits. 
			# onoff:bit 15		1:on / 0:off
			# tv format:bit 12~14	0:PAL / 1:NTSC / 2:PAL_M / 3:PAL_N / 4:PAL_60 / 5:NTSC_443
			# source picture height:bit 0~11
			# For example : if open logo in bootload, and display format is PAL, and source picture is 480, then it should be set to 0x81e0.
#define CRYSTAL_TYPE		0x1E	// 8bit. 0:27M; 1:13.5M
#define PAN_TYPE			0x1F	// 3bits.[bit7-bit5] 0:hwscan; 1:compan
#define PAN_TYPE_MASK		0xE0
#define DVBC_SUPPORT		0x1F	// 2bit.[bit4-bit3]. 0:DVBS; 1:DVBC/DVBT;
#define DVBC_SUPPORT_MASK 0x18
#define NEC_INVERT			0x1F	// 1bit.[bit2]. 1:support nec invert ir; 0: not suppurt nec invert ir
#define NEC_INVERT_MASK		0x04
#define CHIP_BONDING		0x20	// 8bit.
			# [bit7-bit3: 0], [bit2-bit0: bonding option]
			# bit2: 1 - M3602/M3381, 0 - M3601c/M3381c
			# bit1: 0 - M3601c old IC, 1 - M3601c/M3381c new IC with bonding
			# bit0: 0 - M3601C(D), 1 - M3381C(D)

#define EXT_VERSION			0x80	// 2bytes
#define	PAN_HW_INFO_BASE	0x84	// 60bytes.	reference struct pan_hw_info
#define STBY_PAN_TYPE		0xC0	// 1byte 	1--show timer; 2--show off; 3--show blank
#define BOOT_TYPE			0xC1	// 1bit.[bit7]	0:bootup; 1:enter into standby after cold boot.
#define BOOT_TYPE_MASK		0x80
#define PAN_KEY_NUM			0xC1	// 3bits.[bit6-bit4] 0:one panel standby key; 1:two key; other: not define now
#define PAN_KEY_NUM_MASK	0x70
#define IRP_KEY_NUM			0xC1	// 4bits.[bit3-bit0] 0:one ir standby key; 1:two key; 2:three key; 3: four key; other: not define now
#define IRP_KEY_NUM_MASK	0x0F
#define LED_ARRAY_BASE		0xD0	// 16bytes.	'0','1','2','3','4','5','6','7','8','9','o','F',':','-','_',' '

#define IRP_KEY_STANDBY1	0x100
#define IRP_KEY_STANDBY2	0x104
#define IRP_KEY_STANDBY3	0x108
#define IRP_KEY_STANDBY4	0x10C
#define PAN_KEY_STANDBY1	0x110
#define PAN_KEY_STANDBY2	0x114
#define PAN_KEY_STANDBY3	0x118
#define PAN_KEY_STANDBY4	0x11C


#define	SCB_NUM		0

#define	SETING_ADDR		0x48
#define	DIG0_ADDR		0x68
#define	DIG1_ADDR		0x6a
#define	DIG2_ADDR		0x6c
#define	DIG3_ADDR		0x6e

#define	KEY_ADDR		0x4f


#define HAL_GPIO_I_DIR			0
#define HAL_GPIO_O_DIR			1

#define GPIO_REG_ARRAY_SIZE		5	// refer to gpio_dir_reg_array[], etc.


# MACRO: bin2ascii(reg b1, reg d1)
#  reg b1: Input binary data.
#  reg d1: Output BCD code data.
# Internal:
#  t0: ;
#  t1: Primary higher 4 digital;
#  t2: Lower 4 bit digital;
#  t3: ;
#
		.macro	bin2ascii b1,d1
		andi	t0, \b1, 0xf0;
		srl		t0, 4;					# 6bits->2bits higher
		srl		t1, t0, 1;
		addu	t1, t0;					# Get the base: 00b=>0d, 01b=>1d, 10b=>3d, 11b=>4d
		sll		t2, t1, 3;
		sll		t3, t1, 1;
		addu	t3, t2;					# 10X: 0=>0, 1=>10, 2=>20, etc...
		subu	t2, \b1, t3;			# Get draft lower value to t2
		li		t0, 10;
		blt		t2, t0, 91f;			# If lower 4bits<10, finished
		nop
		addiu	t1, 1;					# Else higher+1, and lower-10.
		sub		t2, t0;
		blt		t2, t0, 91f;			# If lower 4bits<10, finished
		nop
		addiu	t1, 1;					# Else higher+1, and lower-10.
		sub		t2, t0;
91:		sll		t1, 4;
		or		\d1, t1, t2;
		.endm

# MACRO: get_led_array(reg dr, reg base)
#	reg dr: load led_array to dr.
#	reg base: address of "boot.cfg" in flash
		.macro	get_led_array dr, base
		addi	\dr, \base, LED_ARRAY_BASE
		.endm

# MACRO: get_ir_power_key_num(reg dr)
#	reg dr: load ir power key number to dr.
#	reg base: address of "boot.cfg" in flash
		.macro	get_ir_power_key_num dr, base
		lb		\dr, IRP_KEY_NUM(\base)
		andi	\dr, IRP_KEY_NUM_MASK
		.endm

# MACRO: get_fp_power_key_num(reg dr)
#	reg dr: load fp power key number to dr.
#	reg base: address of "boot.cfg" in flash
		.macro	get_fp_power_key_num dr, base
		lb		\dr, PAN_KEY_NUM(\base)
		andi	\dr, PAN_KEY_NUM_MASK
		.endm
				
# MACRO: get_ir_power_key(reg dr, reg index, reg base)
#	reg dr: load No. index ir power key to dr.
#	reg base: address of "boot.cfg" in flash
		.macro	get_ir_power_key dr, index, base
		beq		\index, 0, 90f
		nop
		beq		\index, 1, 91f
		nop
		beq		\index, 2, 92f
		nop
93:
		lw		\dr, IRP_KEY_STANDBY4(\base)	# get ir standby key 4
		b		99f
		nop
92:
		lw		\dr, IRP_KEY_STANDBY3(\base)	# get ir standby key 3
		b		99f
		nop
91:
		lw		\dr, IRP_KEY_STANDBY2(\base)	# get ir standby key 2
		b		99f
		nop
90:		
		lw		\dr, IRP_KEY_STANDBY1(\base)	# get ir standby key 1
99:		
		.endm
		
# MACRO: get_fp_power_key(reg dr, reg index, reg base)
#	reg dr: load No. index fp power key to dr.
#	reg base: address of "boot.cfg" in flash
		.macro	get_fp_power_key dr, index, base
		beq		\index, 0, 90f
		nop
		beq		\index, 1, 91f
		nop
		beq		\index, 2, 92f
		nop
93:
		lw		\dr, PAN_KEY_STANDBY4(\base)	# get pan standby key 4
		b		99f
		nop		
92:		
		lw		\dr, PAN_KEY_STANDBY3(\base)	# get pan standby key 3
		b		99f
		nop		
91:		
		lw		\dr, PAN_KEY_STANDBY2(\base)	# get pan standby key 2
		b		99f
		nop		
90:
		lw		\dr, PAN_KEY_STANDBY1(\base)	# get pan standby key 1
99:
		.endm


# MACRO: get_pan_hw_info(reg dr, reg base)
#	reg dr: load pan_hw_info to dr.
#	reg base: address of "boot.cfg" in flash
		.macro	get_pan_hw_info dr, base
		addi	\dr, \base, PAN_HW_INFO_BASE
		.endm

# MACRO: gettimerdata(reg sr)
#  reg dr: get timefield to dr
#
		.macro	gettimerdata dr
		li		t1, 0x80000700
		lw		\dr, 0(t1)
		.endm

# MACRO: settimerdata(reg sr)
#  reg dr: set sr(time) to  timefield.
#
		.macro	settimerdata sr
		li		t1, 0x80000700
		sw		\sr,0(t1)	
		.endm

# MACRO: get_pan_type(reg dr, reg base)
#	reg dr: load pan_type to dr.
#	reg base: address of "boot.cfg" in flash
		.macro	get_pan_type dr, base
		lb		\dr, PAN_TYPE(\base)
		andi	\dr, PAN_TYPE_MASK
		srl		\dr, 5
		.endm

# MACRO: gettimercompare1s(reg dr, reg base)
#	reg dr: Output 1s.
#	reg base: address of "boot.cfg" in flash
	.macro	gettimercompare1s dr, base
		lb		\dr, CRYSTAL_TYPE(\base)	# check crystal
		beq		\dr, 1, 91f 				# 13M crystal
		nop
		beq		\dr, 2, 92f					# 28.8M crystal
		nop
		li		\dr,  6750000				# (27000000/4)
		b		93f
		nop
91:
		li		\dr, 421875					# (13500000/32)
		b 		93f
		nop
92:
		li		\dr,  900000				# (28800000/32)
93:
	.endm

# ------------------------------------------------------------------------------
# void hal_gpio_set_dir(pos, dir)
#
# input:
#	a0: gpio pos
#   a1: gpio dir
#
# used:
#	t0: dir reg addr
#	t1
#	t2
# ------------------------------------------------------------------------------
        .globl  hal_gpio_set_dir
        .ent    hal_gpio_set_dir
   		.set	noreorder
hal_gpio_set_dir:
		srl		t1, a0, 5		# t1: index in gpio_dir_reg_array[]
		li		t2, GPIO_REG_ARRAY_SIZE
		bgeu	t1, t2, 1f
		nop
		
		la		t2, gpio_dir_reg_array
		or		t2, t2, 0xa0000000	# ensure not use D-cache to load variable
		sll		t1, t1, 1
		addu	t1, t2, t1		# t1: &gpio_dir_reg_array[index]

		lhu		t2, 0(t1)		# t2: gpio_dir_reg_array[index]
		lui		t0, 0xb800
		addu	t0, t0, t2		# t0: dir reg addr
		
		andi	a0, 0x1f
        lw      t1, 0(t0)		# t1: dir register
        li      t2, 1
        sll		t2, t2, a0		# t2: bit mask
        
		not		t2, t2			# clean bit
		and		t1, t1, t2

		andi	a1, 1			# set bit
		sll		a1, a1, a0
        or      t1, t1, a1
        sw      t1, 0(t0)
        nop
1:
        jr      ra
        nop
   		.set 	reorder
        .end    hal_gpio_set_dir

# ------------------------------------------------------------------------------
# void hal_gpio_set_bit(pos, val)
#
# input:
#	a0: gpio pos
#	a1: gpio val
#
# used:
#	t0: output reg addr
#	t1
#	t2
# ------------------------------------------------------------------------------
        .globl  hal_gpio_set_bit
        .ent    hal_gpio_set_bit
   		.set	noreorder
hal_gpio_set_bit:
		srl		t1, a0, 5		# t1: index in gpio_do_reg_array[]
		li		t2, GPIO_REG_ARRAY_SIZE
		bgeu	t1, t2, 1f
		nop
		
		la		t2, gpio_do_reg_array
		or		t2, t2, 0xa0000000	# ensure not use D-cache to load variable
		sll		t1, t1, 1
		addu	t1, t2, t1		# t1: &gpio_do_reg_array[index]

		lhu		t2, 0(t1)		# t2: gpio_do_reg_array[index]
		lui		t0, 0xb800
		addu	t0, t0, t2		# t0: output reg addr

		andi	a0, 0x1f
        lw      t1, 0(t0)		# t1: output register
        li      t2, 1
        sll		t2, t2, a0		# t2: bit mask
        
		not		t2, t2			# clean bit
		and		t1, t1, t2

		andi	a1, 1			# set bit
		sll		a1, a1, a0
        or      t1, t1, a1
        sw      t1, 0(t0)
        nop
1:
        jr      ra
        nop
        .set 	reorder
        .end    hal_gpio_set_bit

#--------------------------------------------------------------------
#
#   Function_Name: sys_preboot
#     This function used only for board dedicat issue patch, just as
#     turn off LED GPIO, if you want do other patch about chipset,
#     please added into _Init_Chipset in boot.S.
#--------------------------------------------------------------------
		.globl  sys_preboot
		.ent	sys_preboot
		.set noreorder
sys_preboot:
#######force into standby mode
#		li	s8, 0xdeadbeef

#ifdef DDR_POWER_CONTROL_ENABLE
		move	t4, ra							# t4: save ra
	# POWER ON DDR
		li		a0, DDR_POWER_CTL_GPIO_POS		# a0: gpio pos
		jal		hal_gpio_set_bit				# set gpio output
		li		a1, DDR_POWER_CTL_GPIO_POLAR	# a1: active polarity

		li		a0, DDR_POWER_CTL_GPIO_POS		# a0: gpio pos
		jal 	hal_gpio_set_dir				# set gpio dir
		li		a1, HAL_GPIO_O_DIR				# a1: gpio dir

		move	ra, t4
#endif
		jr		ra
		nop
		.set 	reorder
		.end	sys_preboot

		.globl  sys_postboot
		.ent	sys_postboot
		.set noreorder
sys_postboot:
		jr		ra
		nop
		.set 	reorder
		.end	sys_postboot
				
#--------------------------------------------------------------------
#   Function_Name: sys_get_pinconfig(int chiptype)
#     This function used only for costomer to read in strap pins 
#     config, and do some further config according it.
#	chiptype =	1 : M3329
#							2 : M3329C		
#	Returns: v0: strap pin soft-control info
#					bit2: mem control 	0: disable, 1: enable
#					bit1: mem clock: 	0: 135M, 1: 120M
#					bit0: mem size:		0: 8MB, 1: 16MB
#--------------------------------------------------------------------
		.globl  sys_get_pinconfig
		.ent	sys_get_pinconfig
		.set noreorder		
sys_get_pinconfig:
		jr		ra
		nop				
		.set 	reorder
		.end	sys_get_pinconfig
		

/***************************************************************
*Function Name:	sys_prestandby
*Arguments: 	
*		
*Description:	Initialize IR & I2C before goes into standby mode.
*
***************************************************************/
		.globl	sys_prestandby
		.ent	sys_prestandby
		.set	noreorder
sys_prestandby:
		move	k0, ra				
		nop

		jal	ini_ir				# Init IR
		nop

####### Check i2c type(GPIO or SCB) and its information here.
		jal		get_boot_cfg_addr
		nop
		move	k1, v0					# k1: address of "boot.cfg" data

		get_pan_hw_info t8, k1
		lbu		t8, (t8)
		andi	t8, 3
		bnez	t8, 2f
		nop
1:
		jal 	i2c_scb_init_s			# Init SCB
		li	a0, SCB_NUM

		li	a1, SETING_ADDR			
		li	a2, 0x01
		jal	i2c_scb_write_s
		li	a0, SCB_NUM
		b	3f
		nop
		
####### Init GPIO type of I2C.
2:
/* ??, will mask 20130110
		lui t0, 0xb800
		lw  t1, 0x88(t0)
		lui t2, 0x0300
		or  t1, t2
		sw  t1, 0x88(t0)

		lui t0, 0xb800
		lw  t1, 0x43c(t0)
		li  t2, 0x0402
		or  t1, t2
		sw  t1, 0x43c(t0)
*/	
		jal 	i2c_gpio_init_s			# Init GPIOs
		nop
		li	a2, SETING_ADDR			# Display DIG3
		li	a3, 1
		jal	i2c_gpio_write_s
		li	a0, SCB_NUM		
3:		
		lbu	t1, STBY_PAN_TYPE(k1)
		beq	t1, 0, 0f				# 0--show "----"	
		nop
		beq	t1, 1, 1f				# 1--show timer
		nop
		beq	t1, 2, 2f				# 2--show "off"
		nop
		beq	t1, 3, 3f				# 3--show blank
		nop
		b	5f
		nop
0:
		li	s6, 0xdddd			# "----" index
		b	5f
		nop
1:
		li	t0, (0x1f<<12)		# Hour in ASCII
		and 	v0, t0, s5
		srl 	v0, 12
		bin2ascii v0, t5
		sll 	t5, 8
		li	t0,(0x3f<<6)			# Minute in ASCII
		and 	v0, t0, s5
		srl 	v0, 6
		bin2ascii v0, t4
		or	s6, t4, t5		
		settimerdata s6
		b	5f
		nop
2:
		li	s6, 0xf0bb			# "OFF " index 0xabbf->0xf0bb
		b	5f
		nop
3:
		li	s6, 0xffff				# "    " index
5:
#ifdef DDR_POWER_CONTROL_ENABLE
	# POWER OFF DDR
		li		a0, DDR_POWER_CTL_GPIO_POS		# a0: gpio pos
		li		a1, DDR_POWER_CTL_GPIO_POLAR	# a1: gpio polarity
		jal		hal_gpio_set_bit				# set gpio output
		xori	a1, 1							# a1: inactive polarity

		li		a0, DDR_POWER_CTL_GPIO_POS		# a0: gpio pos
		jal 	hal_gpio_set_dir				# set gpio dir
		li		a1, HAL_GPIO_O_DIR				# a1: gpio dir
#endif
		move	ra, k0
		jr		ra
		nop
		.end sys_prestandby


		.globl	sys_poststandby
		.ent	sys_poststandby
		.set noreorder
sys_poststandby:
		move	k1, ra

#		get_pan_type	t1
#		bnez		t1, 2f
#		nop
	
		move	ra, k1
		jr		ra
		nop
		.set reorder
		.end sys_poststandby


/***************************************************************
*Function Name:	sys_standby_process
*		
*Description:			
*
***************************************************************/
		.globl	sys_standby_process
		.ent	sys_standby_process
		.set	noreorder	
sys_standby_process:
		move	k0, ra
	
		mfc0	t0, C0_COUNT
		bgtu	t0, s4, _key_board_scan
		nop
		
		li	v0,0
		nop
		jr	ra
		nop

_key_board_scan:	
		jal		get_boot_cfg_addr
		nop
		move	k1, v0				# k1: address of "boot.cfg" data

		gettimercompare1s	t1, k1
		srl		t1, 3
		addu	s4, t1				# 1/8 second scan

		get_pan_hw_info t8, k1
		lbu		t8, (t8)
		andi	t8, 3
		bnez	t8, 1f
		nop	
		li	a1, KEY_ADDR
		jal	i2c_scb_read_s			# Key board scan
		li	a0, SCB_NUM
		b   2f
		nop
1:	
		li	a2, KEY_ADDR
		jal	i2c_gpio_read_s			# Key board scan
		li	a0, SCB_NUM
		andi v0, 0xff
2:
		beq	v0, 0xff, 1f			# invalid key code, not care
		nop

		lbu	t1, PAN_KEY_STANDBY1(k1)
		beq	v0, t1, _key_board_exit
		nop

		mfc0	t0, C0_COMPARE
		gettimercompare1s	t1, k1
		srl		t1, 3						# 1/8 second
		subu	t2, t0, s4
		bltu	t2, t1, _led_display	
		nop

1:
		move	ra, k0
		jr	ra
		nop

_led_display:	
		lb	t1, STBY_PAN_TYPE(k1)
		bne	t1, 1, 2f					# if not show timer, jump to 2f
		nop
		
		gettimerdata	t0
		move		s6, t0

2:
		
#######Display LED 3.
		srl	t0, s6, 0
		andi	t0, 0x0f
		get_led_array	t4, k1		# Turn BCD code to Display bitmap
		addu	t1, t4, t0
		lbu 	t0, (t1)

		bnez t8, 1f
		nop			
		li	a1, DIG3_ADDR			# Display DIG3
		or	a2, t0, t0
		jal	i2c_scb_write_s
		li	a0, SCB_NUM
		b   2f
		nop		
1:
		li	a2, DIG3_ADDR			# Display DIG3
		or	a3, t0, t0
		jal	i2c_gpio_write_s
		li	a0, SCB_NUM		
2:
#######Display LED 2.
		srl	t0, s6, 4
		andi	t0, 0x0f	
		get_led_array	t4, k1		# Turn BCD code to Display bitmap
		addu	t1, t4, t0
		lbu 	t0, (t1)

		bnez t8, 1f
		nop					
		li	a1, DIG2_ADDR			# Display DIG2
		or	a2, t0, t0
		jal	i2c_scb_write_s
		li	a0, SCB_NUM	
		b   2f
		nop
1:
		li	a2, DIG2_ADDR			# Display DIG2
		or	a3, t0, t0
		jal	i2c_gpio_write_s
		li	a0, SCB_NUM
2:	
#######Display LED 1.
		srl	t0, s6, 8
		andi	t0, 0x0f	
		get_led_array	t4, k1		# Turn BCD code to Display bitmap
		addu	t1, t4, t0
		lbu 	t0, (t1)

		li	t1, 0x01
		and	t1, s5
		beqz	t1, _no_dot
		nop

		lb	t1, STBY_PAN_TYPE(k1)
		bne	t1, 1, _no_dot			# if not show timer, jump to _no_dot
		nop		

		ori	t0, 0x80
		
_no_dot:	
		bnez t8, 1f
		nop				
		li	a1, DIG1_ADDR			# Display DIG1
		or	a2, t0, t0
		jal	i2c_scb_write_s
		li	a0, SCB_NUM		
		b   2f
		nop
1:
		li	a2, DIG1_ADDR			# Display DIG1
		or	a3, t0, t0
		jal	i2c_gpio_write_s
		li	a0, SCB_NUM		
2:
#######Display LED 0.
		srl	t0, s6, 12
		andi	t0, 0x0f	
		get_led_array	t4, k1		# Turn BCD code to Display bitmap
		addu	t1, t4, t0
		lbu 	t0, (t1)

		bnez t8, 1f
		nop			
		li	a1, DIG0_ADDR			# Display DIG0
		or	a2, t0, t0
		jal	i2c_scb_write_s
		li	a0, SCB_NUM
		b   2f
		nop
1:
		li	a2, DIG0_ADDR			# Display DIG0
		or	a3, t0, t0
		jal	i2c_gpio_write_s
		li	a0, SCB_NUM
2:		
		move	ra, k0
		jr	ra
		nop


_key_board_exit:
		bnez t8, 1f
		nop
#######Display LED 3.
		li	a1, DIG3_ADDR			
		li	a2, 0x7f
#		jal	i2c_scb_write_s
		li	a0, SCB_NUM		

		li	a1, DIG2_ADDR			
		li	a2, 0x7f
#		jal	i2c_scb_write_s
		li	a0, SCB_NUM
		
		li	a1, DIG1_ADDR			
		li	a2, 0x7f
#		jal	i2c_scb_write_s
		li	a0, SCB_NUM		

		li	a1, DIG0_ADDR			
		li	a2, 0x7f
#		jal	i2c_scb_write_s
		li	a0, SCB_NUM	
1:
		move	ra, k0
		li	s8, 0xdeadbead			# Set the flag about time to REF
		jal 	exit_standby				# Power key press, exit standby
		nop
		
		.set reorder
		.end sys_standby_process


#define SYS_IC_NB_BASE_H		0xb800
#define SYS_IC_NB_EISR			0x30
#define SYS_IC_SB_IRC_BITIE 	0x80000
#define SYS_IC_PMU_BASE 	    0xb8018d00
#define SYS_IC_PMU_PRS_KEY_CFG 	0xb0
#define SYS_IC_KEY_PRS_ST_NORM	0x100000
#define SYS_IC_SB_PMU_KEY_BITIE		0x1000000
		.globl	sys_standby_exception
		.ent	sys_standby_exception
sys_standby_exception:	
		.set	noreorder	
		la		t1, 3f					# Running in cache
		sll 	t1, 4
		srl 	t1, 4
		lui 	t0, 0x8000
		or		t1, t0
		jr		t1
		nop
3:
		lui 	t1,SYS_IC_NB_BASE_H
		lw		t2,SYS_IC_NB_EISR(t1)
		li		t0, SYS_IC_SB_IRC_BITIE
		and 	t3,t2,t0				# IR interrupt?
		bnez	t3,2f
		nop
#if 0
 		lui 	t1,SYS_IC_NB_BASE_H
 		lw		t2,SYS_IC_NB_EISR(t1)
 		li		t0, SYS_IC_SB_PMU_KEY_BITIE # pmu power key interrupt
 		and 	t3,t2,t0	
 		beqz	t3,5f
 		nop

 		li    	t1, SYS_IC_PMU_BASE
 		li    	t2, SYS_IC_KEY_PRS_ST_NORM
        
 		lw      t3, SYS_IC_PMU_PRS_KEY_CFG(t1) 
 		or      t3, SYS_IC_KEY_PRS_ST_NORM
 		sw      t3, SYS_IC_PMU_PRS_KEY_CFG(t1)    #clear key interrupt 
 		li  	s8 , 0xdeadbead
 		jal 	exit_standby
 	   	nop

5:
		li		s8, 0xdeadbeef			# Set the flag about enter IC stanby again
		jal 	exit_standby
		nop
#endif
2:
		jal 	get_ir					# Get IR code
		nop

## if invalid key, jump to 4f
		li		t0, 0
		move	v1, v0
		beq		t0, v1, 4f
		nop	
		
		jal		get_boot_cfg_addr		# v0: address of "boot.cfg" data
		nop

		get_ir_power_key_num	t2, v0
check_ir_power_key:				
		get_ir_power_key	t0, t2, v0	# Check POWER remote key code		
		beq 	v1, t0, get_ir_power_key
		nop
		beqz	t2, 4f
		nop
		b		check_ir_power_key
		addiu		t2, -1
get_ir_power_key:		
		li		s8, 0xdeadbead			# Set the flag about time to REF
		jal 	exit_standby
		nop
4:
		nop
					nop
		.set mips3
		eret
		.set mips1
		nop
		nop
		.set reorder
		.end sys_standby_exception

gpio_dir_reg_array:
		.half	0x0058, 0x00d8, 0x00f8, 0x0358, 0x0458

gpio_di_reg_array:
		.half	0x0050, 0x00d0, 0x00f0, 0x0350, 0x0450

gpio_do_reg_array:
		.half	0x0054, 0x00d4, 0x00f4, 0x0354, 0x0454

